Chip stacking technology can bring two chips close together, thereby enabling faster data transmission between the two chips and consuming less power. Memory chips can be stacked together to obtain a memory module with a large storage capacity. In addition to stacking two of the same chip, two chips with different functions may also be stacked together to combine different functions.
For example, three-dimensional integration of semiconductor chips typically employs through-substrate vias (TSV's) that connect the first side of a semiconductor chip to a second side of the same semiconductor chip. Multiple semiconductor chips may be vertically stacked employing the through-substrate vias (TSV's). While such benefits of three-dimensional integration of semiconductor chips are generally known, vertical stacking of multiple semiconductor chips requires die-to-die, die-to-wafer, or wafer-to-wafer alignment. In other words, the alignment between the two bonded objects is the key technique to implement the three-dimensional integration semiconductor chips typically employing through-substrate vias.
This “Discussion of the Background” section is provided for background information only. The statements in this “Discussion of the Background” are not an admission that the subject matter disclosed in this “Discussion of the Background” section constitutes prior art to the present disclosure, and no part of this “Discussion of the Background” section may be used as an admission that any part of this application, including this “Discussion of the Background” section, constitutes prior art to the present disclosure.